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Serial Jumble

November 22, 2017

17-11-22 logic vs windows
Just for my records. I see a fair bit of corruption in the serial datastream shown by my terminal program. There’s enough that i wouldn’t consider it useable. I tracked down one instance and lined up the logic analyzer with the terminal program output. The logic analyzer trace looks fine but somehow windows or the terminal program is goobering it. Note that i’ve been using this program forever with no such issues. typically seeing this i would think the AVR was at fault but it’s not involved in the serial flow. I am using the pololu serial adapter which is unusual for me – maybe that’s what’s up.

UPDATE: yup – the pololu adapter was causing the issue. when i use my normal ftdi cable it’s fine. For the record, the “monitor program” and serial routines are below. AND: I tried the pololu adapter at 4800 baud with similar results. just not practical for what i’m doing. Unfortunate because It means swapping cables to test. I do have another FTDI adapter I can try though.

//VserialNW.c - serial demo program
//17-11-21 adapted to use makeit.bat for setting options
#include <olduino.h>
#include <nstdlib.h>
#define putc(x) putcser(x)
unsigned char getcser();
#define getc() getcser()
void putcser(unsigned char);
#include <dumper.c>
void main(){
	unsigned char cin='?';
	unsigned char * addr=0;
	asm(" seq\n"); //make sure Q is high to start
	printf("\nSerial Monitor Here\n");
		printf("> ");
		switch (cin){
			case '?':
			case '+':
				printf("%c/%x unrecognized\n",cin,cin);
void includeser(){
	asm(" include");
#include <olduino.c>
#include <nstdlib.c>
************ follows********************
;bit-bang Serial routines adapted from Josh Bensadon's VELFbios-v3.1.asm
;Transmit Byte via Q connected to RS232 driver
;call via SCRT
;Byte to send in r12.0
;Destroys r14
;17-11-22 regoobered to 
bitdelay: MACRO baudrate,cpuspeed,baseline,xreg
	rept ((cpuspeed/(baudrate*8)-baseline))/3
	rept (((cpuspeed/(baudrate*8)-baseline)#3))>=1
	sex xreg
	align 32
_putcser:		;entry from C program with character in reg 12
	ldi 9		;9 bits to transmit (1 start + 8 data)
	plo r14
	glo r12
	shl		;set start bit
	rshr		;DF=0

	bdf $+5		;10.5   jump to seq to send a 1 bit
	req		;11.5   send a 0 bit
	br $+5		;1      jump +5 to next shift
	seq		;11.5   send a 1 bit
	br $+2		;1      jump +2 to next shift (NOP for timing)
	rshr		;2      shift next bit to DF flag
	phi r14		;3      save D in r14.1
	DEC r14		;4      dec bit count
	glo r14		;5      get bit count
	bz .txcret	;6      if 0 then all 9 bits (start and data) sent
	ghi r14		;7      restore D
	bitdelay BAUDRATE,CPUSPEED,20,2
	br .txcloop	;9.5    loop back to send next bit
.txcret: ghi r14		;7
	bitdelay BAUDRATE,CPUSPEED,16,2
	seq		;11.5 stop bit
	cretn		;return and re-call will cover stop bit time
;Receive Byte via EF3 connected to RS232 receiver
;Receives 8 bits
;call via SCRT
;Returns with Byte received in D and rf.0
;Destroys r14.0
	align 64
 	ldi 8		;start bit +7 bits from loop, last bit on returning
	plo r14
	ldi 0
.rxcw:			;wait for start bit
	;bn4 $+4		;loop while high
	;br  RomLoad
	bn3 .rxcw	;each instr takes 9us, we need 104us = 11.5
			;delay 1/2 bit time to center samples
	NOP		;     Don't test for correct start bit
	NOP		;     it will work. if there's too much
	NOP		;     noise on the line, shorten the cable!
	bitdelay BAUDRATE,CPUSPEED,20,2
	b3 $+6		;11.5 sample rx input bit
	ori 80h		;1
	br $+4		;2
	phi r14		;1
	phi r14		;2
	shr		;3
	phi r14		;4
	DEC r14		;5
	glo r14		;6
	bz .rxcret	;7
	ghi r14		;8
	br  .rxcloop	;9
.rxcret: ghi r14	;8
	ghi r14		;9
	bitdelay BAUDRATE,CPUSPEED,20,2
	b3 $+4		;11.5 sample last rx input bit
	ori 80h		;1
	plo r15

17-11-22 serialOK

UPDATE: The analogy to the AVR made me think that maybe i was just overrunning a buffer in the Pololu chip. I tried it cutting down the size of the dump to 16 bytes and it’s fine – great news.


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