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The 1806 – So Far Meh

February 27, 2017

So I have the 1806 running reliably and I’ve done a couple of instruction adaptations. So far not so good.  My implementation of SCAL/SRET is clumsy and as a result the code is much bulkier.  My “Hello From The Other Side” program goes from 5,941 bytes to 6,321. My hope would be that if i get the clumsiness fixed this would come more nearly even. The only other new instruction that looked like an easy win is a 16 bit immediate register load RLDI – that brought me back to 6265 bytes. There are just a couple of other instructions that have potential for performance improvement like register store via X and decrement RSXD and companion RLXA.  There are a bunch of decimal instructions which are probably completely useless.

One good thing is that the way i packaged the compiler output as macros really pays off for instruction changes. RLDI, RSXD, and RLXA went into exactly one spot each in the prolog file. The combination of those brought me back to 6161 bytes so, if i started even after SCAL/SRET I’d be down a couple of percent in size and probably a bit better in execution time.

ldiReg:	macro	reg,value
 if MOMCPU=$1805
 	RLDI	reg,value
 else
	ldi	(value)&255
	plo	reg
	ldi	(value)>>8; was/256
	phi	reg
 endif
	endm
popr:	macro	reg
 if MOMCPU=$1805
 	RLXA	reg
 else
	lda	sp
	phi	reg
	lda	sp
	plo 	reg
 endif
	endm

In the image below the 1806 is displaying the four bytes of machine code for the body of a do-nothing function. For the 1802 it would be a single byte D5.
17-02-27-1806
The functional payoff for the 1806 may come from the counter/timer instructions.

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