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Z80 I/O decoding – It’s the Interrupt Stupid!

November 27, 2015

15-11-27 iofailI’ve been fighting with I/O decoding for my SPI chip and i think i understand what’s going on.  I was enabling the chip on NAND(A7,NOT(/IOREQ)).  i.e. an I/O cycle where A7 is high.  I found I was getting a trigger every millisecond but hunting through the monitor code i could not find any instances of in or out instructions to ports 8X.  I turns out that the interrupt cycle itself does an ioreq with the address bus set to the program counter.  I think that neither /rd nor /we are active which is why Lee’s 74138 circuit doesn’t trigger.  I don’t think i can use that since i need to activate the chip for both writes and reads.  I need M1 high, A7 high, /IOREQ low and then i need a low as output.

which is, I guess, NAND(NOT(/IOREQ),NOT(NAND(M1,A7))).  Ok, I can do that with the 74c00.



From → Olduino/Z

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