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Adding the TP3465V SPI Chip

November 27, 2015

The TP3465V is expensive, rare, and discontinued, but it implements a complete SPI solution for a microprocessor like the Z80.  Matt Millman used one in the 80duino and i’ve got one for the olduino/z prototype.15-11-27 SPI

It comes in a 28 pin PLCC package and I’m going to socket it with a plcc socket which i haven’t used before.  There’s a lot of connections to make but all pretty straight forward.  The only glue is for the chip select.  After one long false start I got the I/O selection right.  The Chip is addressed at 80-8F and  /CS is NAND(NOT(NAND(M1,A7)),NOT(/IOREQ)) which I can do with a single nand chip.  I’ll mount the nand chip on the solderless breadboard for now but leave room on the PCB.

The TP3465 is seriously cool.  At its most automated the Z80 writes to a single location (say 0x82) and the spi chip lowers the CS0 select pin, clocks out the 8 bits on MOSI (and 8 in on MISO) then raises chip select.  In the image above the long delay between transmissions is strictly due to my code.

#include <stdio.h>
#include <olduino.h>
unsigned char in(unsigned char dir);
void out(unsigned char dir, unsigned char data);

void main(){
	unsigned char payload=0;
	out(0x8f,0xfe);	//port direction CS0 is output
	out(0x8A,0xFF);	//cs0 inactive
	out(0x8D,0x02);	//clockrate is 1mhz
	while(1){
		out(0x82,payload++);
	}
}
# include <olduino.c>
void ioincluder(){
//thanks to Avelino Herrera Morales for the in and out routines
//http://msx.atlantes.org/index_en.html
	__asm
_in::
	push ix
	ld ix,#0
	add ix,sp

	ld c,4(ix)
	in l,(c)

	pop ix
	ret


_out::
	push ix
	ld ix,#0
	add ix,sp

	ld c,4(ix)
	ld a,5(ix)
	out (c),a

	pop ix
	ret
	__endasm;
}

15-11-27 breadboard15-11-27 bottom

15-11-27 schematic

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From → Olduino/Z

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