I’ve got the 4MHZ membership card shipping out data to the spi circuit so fast that it’s coming back with another byte before the shiftout has finished. I’ll have to put a 16mhz crystal in the AVR and mess with the code to catch up. The top signal is the shift register load driven by OUT 6 and TPB, MOSI is two signals below that, and SCK is on the bottom. You can see that the load signal steps on the shiftout. I see that the *first* byte is corrupt which seems odd but I’ll see how it goes with the faster clock.
The encouraging thing is that the total gap between the end of one load pulse and the beginning of the next is 3.75 us. I need only 2 us to shift the 8 bits at 4mhz and the reaction time of the AVR is about 1.75us even with the avr running at 8mhz. There *should* be enough headroom in there to make this feasible. I happen to have a 20mhz resonator for the AVR so I’m going to try that today.