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Prepping for the 74165

May 27, 2014

The 74165 wants a negative going pulse instead of the positive pulse to load the cd4021.  Rather than just invert the N1 pulse I’ve been using, I used a spare nand gate to combine N1 with TPB.  The shorter pulse (.6 us vs 5 us) leaves a lot more time for shifting.  If I get the 1802’s clock up to 3MHZ the gated pulse would come down to 300 us.  I’m not sure the AVR could catch that but it doesn’t really have to – it can continue to look for N1 since it waits for the end of it anyway.  I think this is going to work well.

14-05-27 TPB

Here’s a bit of the schematic showing the 4021 and 74165 master out shift registers together – the 4021 is disconnected from mosi.
14-05-27 schematic


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