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State of the Board

March 20, 2014

14-03-20 bottom view 14-03-20 topview

I’ve been working with this for a couple of weeks but I hadn’t posted a picture of the final kluge so here it is.  I had built the board to use a 74hc238 address decoder and left a lot of spare IC space for corrections and evolutions.  As it was, I grabbed the wrong eagle footprint for my decoder IC so that got moved to a spare slot and i used the rest of the open real estate to add the atmega from the original olduino board.  The mega now handles loading the 1802, communicating with the PC when it sees the 1802 OUT 7, and generating the SPI clock when requested by the 1802 doing an OUT 6.  I believe I had posted the schematic before but I’ll re-link to it below.  I *may* do one more iteration of this PCB because it works well but it’s fragile.

14-01-12 schematic


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